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Naga Vardhini is an experienced ASIC/SoC Verification Engineer currently employed at Sankalp Semiconductor since August 2018, with prior experience as an ASIC Design and Verification Engineer at Innovative Logic from September 2016 to August 2018. Naga Vardhini holds a PG-Diploma in VLSI Design and Digital Design from CDAC ACTS, Pune (2015-2016) and an Engineer's Degree in Electrical, Electronics and Communications Engineering from Vasireddy Venkatadri Institute of Technology (2011-2015). Additionally, Naga Vardhini completed studies in Maths, Physics, and Chemistry at Sri Chaitanya Junior College (2009-2011) and attended Nirmala Girls High School.