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Adiveppa J is an experienced engineering professional currently serving as a Senior Design Engineer 2 in Analog Design at Tessolve, starting in February 2024. Prior to this role, Adiveppa worked at Sankalp Semiconductor from May 2021 to March 2024 as an Analog Layout Engineer. Earlier experience includes a position as a Layout Engineer at KarMic Design Private Ltd from July 2017 to May 2021. Adiveppa J holds an educational background from LET College Gokaka.