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Krutarth Kikani has a diverse range of work experience in the field of digital design verification and ASIC design verification. Krutarth started their career in 2014 as an ASIC Design Verification Engineer at Sibridge Technologies, where they were responsible for tasks such as specification study, RTL development, bug fixing, and documentation. Additionally, they were involved in test plan development, synthesis, STA, CDC, and design Lint. In this role, they successfully developed RTL from scratch for projects related to Energy Efficient Ethernet and Precision Time Protocol.

In 2017, Krutarth worked as a Verification Intern at Synopsys Inc. Krutarth'smain achievement during this time was the development of a TCL script that enabled randomized functional verification for the Synplify tool flow. Krutarth also debugged and monitored the Synplify tool regression suite to identify mapper issues and developed coverage-driven test benches for RAM Models.

Most recently, Krutarth joined R2 Semiconductor, Inc. in 2018 as an MTS in Digital Design Verification. The duration of this role is ongoing and there is no specific end date provided.

Overall, Krutarth Kikani has honed their skills in digital design verification and ASIC design verification through their various work experiences, showcasing their ability to contribute to the development and implementation of complex projects.

Krutarth Kikani earned a Master's degree in Digital System/Logic Design from San Jose State University, where they studied from 2015 to 2017. Prior to that, they completed their Bachelor's degree in Electronics and Communication at Charotar University of Science and Technology, Changa, from 2010 to 2014.