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Ramya Nerabetla is a seasoned engineering professional with significant expertise in design verification. Currently serving as a Senior Design Verification Engineer at Marvell Semiconductor since November 2013, Ramya previously held the role of Design Verification Engineer at Intel from June 2007 to October 2013. Ramya's educational background includes a Master's degree in Electrical Engineering from the University of Southern California (2006-2008) and an undergraduate degree in Electronics and Communication Engineering from Jawaharlal Nehru Technological University (2002-2006). Early education was completed at Bharatiya Vidhya Bhavan's Public School in Jubilee Hills (1988-2000).