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Paramhans Kulkarni has a long history of work experience in the engineering field. Paramhans began their career in 2012 as a Design Engineer at CoreEL Technologies, where they had experience in the design of micro architecture of the modules involved in the signal processing domain, coding them in VHDL, simulation and debug of the design with ModelSim, and creating verification test bench using VHDL. In 2014, they moved to Asarva Chips & Technologies Pvt Ltd, where they held the roles of Digital Design Engineer - 2 and Design Engineer. In 2017, they joined Aquantia as a Member of Technical Staff 1 and 2. In 2019, they moved to Marvell Semiconductor as a Senior Design Engineer. Most recently, they joined EdgeQ Inc. in 2020 as a Senior Staff Engineer and Member of Technical Staff.

Paramhans Kulkarni obtained a Bachelor of Engineering (BE) in Electrical, Electronic and Communications Engineering Technology/Technician from SDM College of Engineering and Technology,Dharwad between 2008 and 2012. Prior to that, they completed their PUC in PCMB from Shri Ramakrishna Vidyashala,Mysore between 2003 and 2008.