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Abhijeet Taralkar is a Senior Analog Design Engineer at Cirrus Logic, a position held since September 2021. Prior to this role, Abhijeet gained experience as a Project Intern at Infineon Technologies from October 2018 to September 2021. Abhijeet holds a Doctor of Philosophy (PhD) in Extended Range Incremental Sigma-Delta Modulator from Università di Pavia (2017 - 2020) and a Master of Technology (M.Tech.) in VLSI from the National Institute of Technology Goa (2015 - 2017). Undergraduate studies were completed at Jayawantrao Sawant College of Engineering, Pune (2009 - 2013).