ÂÜÀòÂÒÂ×

Lokesh PeddaYenumula is a Senior Verification Engineer 1 at Microchip Technology Inc. since June 2023, with concurrent roles as a Design Verification Engineer at both Scaledge Technology and PerfectVIPs since November 2021. Prior experience includes serving as a VLSI Engineer at Wipro Limited from June 2019 to December 2021. Lokesh holds a Bachelor of Technology in Electrical, Electronic and Communications Engineering from Sree Vidyanikethan Engineering College (2014-2018) and completed an RTL Design & Verification course in VLSI at Maven Silicon (2018-2019). Educational background also includes intermediate studies at NRI Academy, Guntur (2012-2014) and high school at Keshava Reddy Public School (2007-2012).