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Daniel Ratchen

DFT Engineer at Aril

Daniel Ratchen has over twenty years of experience in the technology industry. Daniel began their career in 1987 as a Software QA Engineer at Mentor Graphics. In 1995, they joined Intel Corporation as a Validation Manager, Test Methodology Lead, and DFX Engineer. From 2007 to 2017, they were the FPGA Test Development Architect and Manager at Lattice Semiconductor. During this time, they also worked as a Design-For-Test Consultant independently. From 2017 to 2021, they were the Director of Engineering Support at crossPORT Network Solutions Inc. and the Software Quality Assurance Engineer at Blue Pearl Software. Currently, they are a DFT Engineer at both Aril Inc. and Sintegra Inc.

Daniel Ratchen attended Oregon State University from 1982 to 1987.

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