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Ramdas Mozhikunnath has been involved in the technology industry since 1999. Ramdas began their career as a Research Engineer at the Center for Development of Telematics (C-DoT). In 2001, they joined Intel Corporation as a Design Verification Engineer, where they worked on the design verification of a multi-core Xeon microprocessor and contributed to uncore and DFX/DFM verification.

In 2006, they moved to Montalvo Systems as a Design Verification Engineer, where they were responsible for the verification of a grounds up new x86 multi core CPU design. This included developing a new testbench, stimulus, checker, and behavioral models.

Ramdas later joined QLogic in 2008 as a Staff Engineer, where they worked on the verification of 10G intelligent NICs. In 2010, they moved to IBM India Pvt Ltd as an Advisory Verification Engineer. In 2014, they joined AppliedMicro as a Senior Staff Verification Engineer/Manager and began working as an Instructor/Blog/Owner for www.verificationexcellence.in.

In 2018, they joined AMD as a PMTS - Design Verification and, in 2020, they began working at Ventana Micro Systems as an Engineer. In this role, they are the DV lead for the India team and is working on high performance RISC-V CPU core, caches, and compute system design. Ramdas is also responsible for testbench development, test planning, execution, debugs, reviews, mentoring, and team management.

Ramdas Mozhikunnath obtained a Bachelor of Engineering (B.E.) in Electrical, Electronics and Communications Engineering from the National Institute of Technology Calicut between 1995 and 1999. Ramdas also holds three certifications from LinkedIn: Artificial Intelligence Foundations: Machine Learning, Essential Math for Machine Learning: Python Edition, and Introduction to Machine Learning with KNIME, all obtained in May 2020.