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Volker Blaschke is a seasoned Senior Chip Designer at TeraDAR, specializing in 6G mmWave RFIC and packaging design since July 2021. As President of Silicon RF Synergy since April 2016, Volker Blaschke represents foundry services for SiGe BiCMOS technologies from IHP Microelectronics in the Americas and Japan. Previous roles include Principal RFIC Designer at BeRex, leading Bluetooth Frontend Module designs, and Principal RF CMOS SOI Designer at Wispry, focusing on CMOS SOI technologies. Volker Blaschke also served as Product Manager at Keysight Technologies, where contributions included marketing and product planning for Si RFIC design automation. As Technical Director at Tower Semiconductor, Volker Blaschke led IP development and design automation innovations in the FEM sector and engaged in high-level pre-sales activities. Volker Blaschke holds a Master of Science in Electrical and Computer Engineering from The University of Texas at Austin and a Dipl.Ing. in Production & Automation Technology from Hochschule München University of Applied Sciences.