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Danilo Pesaresi is an experienced FPGA Engineer at Telsy, having been with the company since June 2021, following an internship there from September 2020 to March 2021. Danilo holds a Master's degree in Ingegneria elettronica from Politecnico di Torino, where studies were completed from 2018 to 2021, and a 1° livello - Laurea L in Ingegneria elettronica from the same institution, earned between 2015 and 2018.