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Sagar Kale is a skilled software engineer with extensive experience in both industry and academia. Currently serving as a Software Engineer at ParityQC since August 2022, Sagar previously held postdoctoral research positions at the University of Vienna from December 2019 to July 2022 and at EPFL from December 2017 to November 2019. Sagar began a career in software engineering at Infosys Technologies Ltd, focusing on IBM/DB2 and PL/SQL, among other technologies, from July 2006 to July 2008, followed by a role at Persistent Systems in 2008. Sagar holds a PhD in Theoretical Computer Science from Dartmouth College and a Master of Technology in Computer Science and Engineering from the Indian Institute of Technology, Bombay, as well as a Bachelor of Engineering in Mechanical from Sardar Patel College of Engineering.