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Rajalakshmi Arumugompillai is an experienced ASIC SOC Application Engineer at Silvaco Inc since July 2022, with a strong background in ASIC design flow and verification. Previous experience includes a role as a Design Engineer at Microchip Technology Inc. from August 2010 to May 2014. Rajalakshmi possesses expertise in Lint analysis using Leda, ModelSim, OTP block-level verification, PTP registers verification with UVM-RAL, and overall UVM environment and verification flow. Proficient in Verilog, System Verilog, and scripting languages including shell, Perl, and Bash, Rajalakshmi is also knowledgeable in GMAKE for automation and version control using Perforce. Academically, Rajalakshmi earned a Bachelor of Engineering in Electronics and Communication Engineering from MIT Campus, Anna University, Chennai, in 2010, following completion of secondary education at Atomic Energy Central School and Kendriya Vidyalaya.