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Karol Farbaniec is a Mixed Signal Verification and Design Engineer at Silicon Creations, with experience in FPGA verification at Nokia, focusing on 5G products using SystemVerilog and UVM. Prior to this, Karol worked as an FPGA Design Engineer at Jagiellonian University, contributing to J-PET data processing on Xilinx FPGAs and SoCs. Additional experience includes internships in FPGA design for time-to-digital converters and embedded software development for reconfigurable FIR filters. Karol holds a Master's degree in Computer Science from Jagiellonian University and a Bachelor's degree in Informatics, along with an Engineering degree in Mechatronics from AGH University of Science and Technology.