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Vivek Urankar is an experienced AMS Layout Design Engineer at SignOff Semiconductors since July 2021. Prior to this role, Vivek held an internship at Kanada Technologies in July 2019, where responsibilities included designing and simulating a 4-Bit Flash ADC in 45nm technology. Vivek also served as a Layout Trainee at Kanada Technologies from September 2018 to April 2019. Educational qualifications include a Bachelor's degree in Electrical, Electronics, and Communications Engineering from RNS Institute of Technology, completed between 2017 and 2020.