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Vijay Vardhan Gupta has extensive experience in the semiconductor industry, currently serving as Director of ASIC Programs at Alphawave IP Group since September 2022 and as Director of ASIC Design at SiFive since April 2020. Prior roles include Associate Director at SYNAPSE TECHNO DESIGN INNOVATIONS PRIVATE LIMITED from February 2018 to March 2020, Engineering Manager at Aricent from October 2015 to February 2018, and Staff Design Engineer at Soft Machines from June 2014 to November 2015, focusing on Full-Chip SoC Integration and low-power design implementations. Vijay's earlier experience includes serving as Engineering Manager at Intel Corporation from June 2005 to October 2013, overseeing the design of multi-million gate graphics cores, and as MTS at 0-in design automation from 2001 to 2005. Academic background includes studies at Motilal Nehru National Institute of Technology, with early academic experience at UC Santa Cruz in 1998.