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Sundar Karthick possesses extensive experience in PCB design and engineering, currently serving as a Senior PWB Designer at Sienna Corporation since June 2017, where responsibilities include the creation and modification of board designs using Allegro 16.6. Prior to this role, Sundar worked as a CAD Engineer at Bit Mapper Integration Technologies Pvt. Ltd from December 2014 to May 2017, focusing on high-speed Xilinx FPGA layouts, PCB footprint creation, and signal integrity analysis. Sundar also gained experience as a Junior PCB Designer at Delhi Control Devices, contributing to various electronic device designs, and began a career as a Junior Trainee at WoodWard Grand Parking Solutions, assisting in parking system technologies. Educational qualifications include a Bachelor of Engineering in Electrical and Electronics Engineering from Panimalar Engineering College and a Diploma in Electrical and Electronics Engineering from Panimalar Polytechnic College.