Niranjan Ramesh is an experienced engineering professional with a strong background in hardware design and development, currently serving as a Team Lead at Sciemetric since September 2015, where responsibilities include circuit design, schematic capture, layout, DFM/DFA, testing/debugging, microcontroller firmware development, and signal and power integrity. Additionally, Niranjan has been an FPGA Designer at Capella Aerospace since November 2018, focusing on radar aircraft transponders. Prior experience includes a role as a Hardware Design Engineer at GestureLogic Inc., developing wearable electronics, and a Teaching Assistant position at Carleton University, instructing on VLSI and Analog Integrated Circuit design. Earlier career stages involved senior and engineer roles at MindTree Ltd., specializing in system design for automotive diagnostics and SoC post-silicon validation. Niranjan holds a Master's degree in VLSI and Mixed Signal IC Design from Carleton University and a Bachelor's degree in Telecommunications Engineering from Visvesvaraya Technological University.
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