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Praveen Badiger is a seasoned professional in the field of electronics and communications engineering, currently serving as a Senior Technical Lead at HCLTech since January 2020, where responsibilities include IO design engineering, standard cell and IO characterization, and application design for online design tools. Prior to this role, Praveen worked as a Design Engineer at HCLTech from October 2015 to August 2019, focusing on DC-DC converter Pspice modeling and application design for the Webench online design tool. Praveen holds a Bachelor of Engineering degree in Electronics and Communications Engineering from Gogte Institute of Technology, earned between June 2012 and May 2015.