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Rok Krajnc is a seasoned engineering professional with extensive experience in ASIC design and firmware development. Currently serving as a Senior ASIC Design Engineer at RLS Merilna tehnika d. o. o. since April 2018, Rok previously held positions at ON Semiconductor as a Firmware Engineer, Aptina as an ASIC Design Engineer, and Insilica as an Engineer. Early career experience includes a role as a Developer at Tref d.o.o. and as a Web Developer at HERMES SoftLab. Rok's academic background includes education from Gimnazija Trbovlje and the University of Ljubljana, Faculty of Electrical Engineering.