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Aniket Datta is a FPGA design engineer at Riverlane. Aniket has over seven years of experience in the field, having worked previously at Texas Instruments as an FPGA engineer.

Datta has led and designed systems for testing next generation high speed ADCs and DACs as analog front end in 5G MIMO systems. Aniket has also designed generic hardware systems with Kintex UltraScale+ FPGAs, for capturing high-speed (JESD SERDES 28Gbps JESD204C/JESD204B), high-bandwidth (200Gbps) data; involving complete RTL coding and bare metal application development on Microblaze.

In addition, Datta has created an Automated Test Equipment (ATE) for complete characterization and testing of devices including tests such as TFT, PBIST, SCAN, Continuity, and Leakage along with performance characterization and tuning of ADC & DAC. The ATE consists of a Zynq UltraScale+ MPSoC connected to a Kintex UltraScale+ via PCIe to provide an optimum balance of resources and features.

Aniket Datta has a Master's Degree in Electrical Engineering (Power Electronics) from the Indian Institute of Science (IISc). Aniket also has a Bachelor's Degree in Electrical Engineering from the IIEST, Shibpur. In addition, they have certification from LinkedIn in Applied Machine Learning: Algorithms and from EF Standard English Test (EF SET) in EFSET English Certificate 84/100 (C2 Proficient).