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Sameera Deshpande-Dalal

Principal Compiler Engineer at Quadric

Sameera Deshpande-Dalal has been working in the software engineering industry since 2004. Sameera began as a Research Assistant at the GCC Resource Center in IIT Bombay, where they worked on improving GCC port for ABACUS and ANUPAMA. In 2008, they moved to NVIDIA Graphics Pvt. Ltd. as a System Software Engineer, where they worked on design and development of compiler enhancements for GPGPU, including rematerialization and compiler optimization. In 2011, they joined ARM Ltd. as a Staff Software Engineer, where they contributed to GCC source in design and development of GCC backend for Cortex-A15, including pipeline description for FP and SIMD unit of Cortex-A15. In 2012, they moved to NVIDIA as a Senior System Software Engineer, where they worked on design and development of compiler enhancements for Tegra. In 2014, they joined Imagination Technologies as a Leading Software Design Engineer, where they proposed a novel approach to represent loop body using primitive operators across all vectorization algorithms and target instructions to optimize existing auto-vectorization. Finally, in 2019, they joined quadric.io as a Senior Compiler Engineer.

Sameera Deshpande-Dalal attended the Indian Institute of Technology, Bombay from 2005 to 2008, where they earned a M.Tech in Computer Science and Engineering (Compilers and Programming languages). Prior to that, they attended the Government College of Engineering, Pune (COEP) from 2000 to 2004, where they earned a BE in Computer Science and Engineering.

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