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Pritesh Tailor currently serves as the Lead Platform Engineer at Previsico since December 2020, after previously holding the role of DevOps Engineer. Prior experience includes working at the University of Surrey from January 2019 to December 2020 as an HPC Systems Administrator, where responsibilities included system administration, development of research computing infrastructure, and providing technical support for HPC. Prior to that, Pritesh worked as an HPC Research Software Engineer at STFC for a brief period in late 2018. Pritesh's academic background includes a PhD in Theoretical and Computational Chemistry and a degree in Chemistry from the University of Nottingham, where significant research focused on computational tools for studying carbon nanomaterials and related spectroscopic properties.