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Atze Van Der Goot has been working as the Team lead R&D Enablement at NXP Semiconductors since January 2021. Prior to this, Atze was the Manager Design Infrastructure & Technology at Catena Holding b.v. for over two decades. Atze is responsible for providing design infrastructure and IC technologies to IC design teams, including HPC IT infrastructure, PDKs from IC foundries, and other IP from third party vendors. Atze has a Propaedeutic + courses degree in Technische Bestuurskunde from Delft University of Technology and an Engineer's degree in Technical Computer Science from Amsterdam University of Applied Sciences.