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Loïc Maître is the VP of Engineering at NOVASPARKS, where Loïc manages a team of engineers specializing in hardware and low latency interfaces for high frequency trading applications. With experience in FPGA design and hardware engineering, Loïc has worked on projects involving memory interfaces, ethernet, and Xilinx high-end FPGAs. Loïc previously worked at Imagination Technologies as a Hardware Design Engineer and has interned at EM Microelectronic and STMicroelectronics. Maître holds a Master's degree in Integrated Circuit Design from Grenoble INP - UGA and has studied Electrical, Electronics, and Communications Engineering at Polytechnique Montréal.