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Jiu Soon Tan is a Senior Design Engineer at Nexperia since January 2022, with prior experience in similar roles at Oppstar Technology from July 2020 to January 2022 and as an Analog Design Engineer at RENESAS SEMICONDUCTOR (MALAYSIA) SDN.BHD between September 2017 and June 2019. Jiu Soon Tan possesses expertise in designing analog circuits according to product specifications, performing circuit analysis, and providing feasible solutions, and is proficient in Cadence Virtuoso, IC characterization, and evaluation. Jiu Soon Tan holds a Bachelor of Applied Science in Electrical and Electronics Engineering from Tunghai University, completed in 2015.