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Jianhua Zhou has a diverse work experience spanning over 15 years. Their most recent position is as a Sr. Principal Engineer at MaxLinear, starting in September 2021. Prior to this, they worked at Western Digital as a Technologist, Signal and Power Integrity, starting in January 2017.

Before joining Western Digital, Jianhua held the role of Sr. Principal SI Engineer at QLogic Corp from August 2013 to October 2016. Jianhua also worked at QLogic Corp. as a Principal SI Engineer from March 2009 to July 2013.

Earlier in their career, Jianhua gained experience as a Principal Signal Integrity Engineer at WELLS-CTI (formerly Antares Advanced Test Technologies) from 2006 to 2009, and as a Sr. SI Engineer at Antares Advanced Test Technologies in the same period.

Jianhua Zhou pursued a Master of Science degree in EM from Tsinghua University from 1980 to 1985.