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Valery Kugel is a highly experienced engineer with a career spanning over two decades in the semiconductor and networking industries, primarily at Juniper Networks since February 2001. Currently serving as a Sr. Distinguished Engineer in the Silicon and System Technology BU, Valery specializes in ASIC System-in-Package (Chiplet) technology architecture and has significant expertise in chip-level multivoltage power delivery design, optical backplane technologies, and silicon photonics. Valery has held various leadership positions, including Distinguished Engineer and ASIC Director, contributing to advanced chip packaging, physical design methodologies, and next-generation interconnect technologies. Prior experience includes roles at Sun Microsystems and Intel, focusing on clock design and component circuit design. Valery holds a Ph.D. in Electrical Engineering from Tel Aviv University, focusing on physical electronics and ferroelectrics.