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Martin Alejandro Heredia is a Digital IC Pre Silicon Platform Engineer at indie Semiconductor since October 2022 and a docente investigador at Grupo de Aplicaciones en Sistemas Embebidos - UTN FRH since January 2018, specializing in FPGA design, firmware development, and simulation using VHDL, Verilog, and Python. Previous experience includes roles as a Digital Design Engineer and Senior Firmware Engineer at Marvell Argentina, focusing on DSP algorithms and firmware for optical transceivers. Additional experience encompasses hardware design and product integration at CYLGEM S.A., as well as electronic technician duties at Indra. Martin Alejandro Heredia holds an electronic engineering degree from Universidad Tecnológica Nacional, along with technical qualifications in audio recording and electronics.