Vishnu Chaitanya Uppala is a System Integration and Test Engineer at in-tech GmbH since February 2023, specializing in Rest Bus Simulation Development for component hardware in the loop using Vector CAPL, alongside error analysis and documentation of bus system faults. Previously, Vishnu completed a master's thesis on machine learning based porosity detection at Bundesanstalt f¨¹r Materialforschung und -pr¨¹fung and contributed as a project intern focusing on data augmentation and defect detection in laser powder bed fusion. Vishnu also conducted research during a bachelor's thesis at Universit?t des Saarlandes on electromagnetic measurements in structural steels. Vishnu holds a master's degree in Digital Engineering from Bauhaus-Universit?t Weimar and a bachelor's degree in Mechanical Engineering from Vel Tech Technical University.
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