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Bharat is responsible for systems and backend silicon engineering at Fungible. He brings over 30 years of experience in silicon development at leading technology companies. Prior to joining Fungible, he served as Senior Director of Backend ASIC Engineering for Juniper Networks where he delivered high speed networking chips used in MX Series 3D Universal Edge Routers and PTX Series Packet Transport Routers. Before Juniper Networks, he was VP of ASIC engineering at Specular Networks Inc, leading the complete end-to-end engineering effort for development of 24-port, 10G switch chip. Prior to this, he worked at Intel Corporation in engineering and management leadership roles. Bharat received a Bachelors in Electronics and Electrical Engineering from Victoria Jubilee Technical Institute (VJTI), India and went on to earn a Masters in Electrical and Computer Engineering from New Jersey Institute of Technology, New Jersey.