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Steven Van Luinen is an experienced engineer with a strong background in ASIC and FPGA design and verification. Steven started their career at Atmosphere Networks, where they designed and implemented testbenches and VHDL modules for the next generation ASIC. Steven then joined Altamar Networks / Ditech Communications as a Hardware Engineer, where they designed multi-layer PCBs and worked on CPU and PCB designs for various projects. After that, they worked at Lateral Sands as a Senior Engineer, contracting to Qualcomm Atheros (QCA), where they worked on design and verification tasks for next-generation ASICs. Steven then moved on to Aquantia, where they continued working as a Design and Verification Engineer, specializing in Ethernet PHYs and UVM testbenches. Steven stayed with Aquantia until their acquisition by Marvell Semiconductor, where they continued their role as a Design and Verification Engineer. Currently, they are working at Ethernovia as a Senior Engineer, focusing on the design of automotive networking products. Overall, Steven Van Luinen has a wide range of experience in hardware engineering and has been involved in various aspects of ASIC and FPGA design and verification throughout their career.

Steven Van Luinen completed their Bachelor of Engineering (BEng) degree in Electrical and Electronics Engineering from The University of Western Australia from 1991 to 1994. Steven then pursued a Doctor of Philosophy (PhD) in Telecommunications from Curtin University, completing their studies from 1995 to 1999.