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Sébastien S.

FPGA Design Verification Engineer at ELSYS Design

Sébastien S. has a diverse work experience in various engineering roles. Sébastien started at STMicroelectronics in 2014, where they worked on optimizing the generation of XML models for a CAD tool and performed static verification of CPUs at the RTL/Gate levels. In 2016, Sébastien joined Somfy, where they were responsible for ensuring compliance of home automation products with European regulations. This involved staying up-to-date with regulatory requirements, managing testing plans, and communicating with external labs. Since 2017, Sébastien has been working as an FPGA Design & Verification Engineer at Elsys Design.

Sébastien S. pursued their education from 2011 to 2014 at Grenoble INP - Phelma, where they obtained a Diplôme d’ingénieur in Microélectronique.

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