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Vanessa Do is an experienced ASIC Hardware Application Manager at CNEX Labs, where responsibilities include managing a team to develop adapter logic for HAL interfaces and ensuring the verification of critical PCIe features. Prior to this role, Vanessa served as a Design Engineer at Altera, focused on PCI Express and SR-IOV development, and held positions at QThink and Broadcom, where expertise in SAS interface verification and ASIC design was demonstrated. Early career experience includes a role as an ASIC Design Engineer at New Japan Radio Semiconductor. Vanessa holds a degree from San Jose State University.