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Umar Lyles is a Mixed Signal Modeling & Verification Manager at Cirrus Logic, where responsibilities include leading a team in architectural exploration, modeling, model verification, and design verification while collaborating with directors and senior managers on best practices. Prior roles at Cirrus Logic included Interim ASIC Verification Manager and AMS Methodology Lead, focusing on global team management, verification schedules, risk planning, and AMS modeling support. Before joining Cirrus Logic, Umar served as a Principal AMS and Modeling Engineer at Intersil, a Senior Analog Designer & AMS Lead at Cirrus Logic, and a Member Group Technical Staff at Texas Instruments, contributing to mixed signal design projects and training junior engineers. Umar holds a Master of Science and a Bachelor of Science in Electrical Engineering from Arizona State University.