ÂÜÀòÂÒÂ×

Ramakanth Goladari is an accomplished engineering professional with extensive experience in analog layout design. Currently serving as a Principal Engineer at Cyient since November 2021, Ramakanth has previously held positions as a Senior Layout Engineer at Ceremorphic, Inc., and as an Engineer in DEG Layout at Micron Technology. Ramakanth's career began at First Pass Semiconductors Pvt Ltd, where roles included Sr. Analog Layout Engineer and Analog Layout Engineer. Ramakanth holds a Bachelor's degree in Electrical, Electronics and Communications Engineering from Acharya Nagarjuna University and a Diploma in Electronics from NTTF (Nettur Technical Training Foundation).