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From 1989 to 1998, Mr. Browy held various positions at Cadence Design Systems including Director of ASIC Design Services, Director of Top-down IC Design Practice, and marketing manager for synthesis, timing analysis, and test products. Prior to 1989, Mr. Browy held numerous other positions in applications engineering and hardware systems development. Mr. Browy has been responsible for system and ASIC design projects involving large-scale ATM switching systems, Non-linear digital video editing systems, and massively parallel multiprocessors. Mr. Browy received a B.S.E.E. from Rensselaer Polytechnic Institute in 1984.