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Srimai I. began their career as an Inplant Trainee at Bharat Sanchar Nigam Limited in June 2013. Srimai then worked on a Study Project on PLC Systems at Bharat Heavy Electricals Limited from November to December 2013. In 2017, Srimai joined Intel Corporation as a Physical Design Methodology (TFM) Intern, where they conducted PPA studies to understand QoR changes in process technologies and technology libraries. Srimai utilized Synopsys tool ICC II - with Lynx GUI for these experiments. From 2018 to the present, Srimai has been employed at Intel Corporation as a SoC Physical Design Methodology Engineer. Recently, in 2022, they joined Astera Labs as a Physical Design Engineer.

Srimai I. earned a Masters of Science degree in Electrical Engineering with a focus on Digital VLSI Design from the University of Minnesota. Additionally, they obtained several certifications including AWK Essential Training from LinkedIn in December 2020, Fusion Compiler from Synopsys Inc in June 2020, and Design Compiler from Synopsys Inc in March 2020. Srimai also pursued a certification in Static Timing Analysis from Udemy, although the specific month and year of completion are not available.