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Steve Torley is an experienced engineer specializing in IC design and implementation within the semiconductor industry. Currently serving as Principal Engineer and IP Qualification Lead at Arm since February 2018, Steve leads RTL qualification and GDS implementation on GPU processors across various technology nodes. Previous roles include Staff Engineer at Arm, Staff Engineer at Qualcomm where expertise in digital physical design was developed, and Senior Engineer at Texas Instruments focusing on CMOS custom analog layouts. Additional experience encompasses senior-level positions at Doulog Technologies and Cadence Design Foundry, with a foundational role as a Student Engineer at Db Research Ltd. Steve holds a BSc (Hons) in Applied Electronics from Liverpool John Moores University.