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John Tran has extensive experience in failure analysis and product engineering, currently serving as a Senior Failure Analysis Engineer at Aptina since October 2011, focusing on root cause analysis for returns related to CMOS sensors in automotive and non-automotive applications. Prior to this role, John held the position of Senior Product & Failure Analysis Engineer at National Semiconductor, where responsibilities included product qualification, yield enhancement, and supporting new processes and products. Earlier in John's career, roles at Supertex Inc. and National Semiconductor Corp. involved new product development, silicon characterization, and root cause analysis for various electronic products. John earned a Bachelor of Science degree in Electrical and Electronic Engineering with a focus on Semiconductor Devices from California State University-Sacramento between 1985 and 1988.