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Sean Little has extensive work experience in engineering, particularly FPGA design. Sean has worked as a Principal FPGA Design Engineer at Verus Research since 2023. Prior to this, they were a Design and Verification Engineer at BlueHalo from 2018 to 2023. Sean also worked as an FPGA Design Engineer at Secturion Systems from 2014 to 2018, where they worked on networked cryptography equipment and developed FPGA build/test infrastructure. Before Secturion, they worked as an FPGA Design Engineer at L-3 Communications from 2010 to 2014, where they worked on both R&D projects and production modems. At THE MATHWORKS LIMITED, they worked as an Application Support Engineer from 2008 to 2010, providing technical support for Matlab, Simulink, and other products. Sean also worked as a Systems Engineer at Northrop Grumman from 2003 to 2007, where they worked on image processing and rapid analysis of satellite payload test data.

Sean Little received their Bachelor of Science degree in Electrical Engineering from Brigham Young University from 1997 to 2003. From 2004 to 2007, they went to the University of Southern California to get their Master of Engineering degree in Electrical Engineering. In addition, they obtained a Private Pilot's License from the FAA in January 2006.