Parin Senta is a Graduate Research Assistant at the University of Michigan, focusing on high-performance course-grained reconfigurable architecture. Previously, Parin served as a PMU Digital Design Intern at Apple, where a 16-bit multi-cycle memoryless processor was designed, achieving a significant area reduction compared to ARM IP alternatives. Experience includes security development at Silence Laboratories, research assistance at the Indian Institute of Technology, Bombay in cryptanalysis and GPU scheduling improvements, as well as hardware engineering at Qualcomm. Parin's educational background includes a Master of Science in Electrical and Computer Engineering from the University of Michigan and a Bachelor of Technology in Electrical Engineering from the Indian Institute of Technology, Bombay. Involvement in leadership roles includes organizing major cultural and technological events.