ÂÜÀòÂÒÂ×

Lalit Sharma is a skilled engineer with experience in FPGA design, platform execution, and RISC-V multicore CPU design validation. With a strong background in VLSI design and a Master's degree in ECE, Lalit has worked at SiFive as a Senior Engineer I and at Pretlist as an FPGA Design Engineer. Additionally, Lalit has experience working in research and development at the Ministry of Defence of India. Lalit has also contributed to academia as a Visiting Lecturer and Research and Teaching Assistant at Deenbandhu Chhotu Ram University of Science & Technology.