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Peter Keswick is a seasoned engineer with extensive experience in process development and yield improvement within the semiconductor industry. Currently serving as a Senior Process Development Engineer at SAGE Electrochromics, Inc. since October 2008, responsibilities include contamination reduction, thermal process optimization, and coatings engineering. Prior to this role, Peter held significant positions at Cypress Semiconductor from 1997 to 2008, including Principal Yield Engineer and Senior R&D Manager, focusing on etch process development. Earlier in the career, Peter worked at Applied Materials from 1988 to 1997, where responsibilities included process engineering management and customer support. Peter Keswick earned an MS and BS in Material Science from the University of California, Berkeley, graduating in 1989 and 1986, respectively.