The Design Verification Team at Rivos is responsible for ensuring the functionality and reliability of RISC-V integrated systems through comprehensive testing and validation processes. Their work involves creating and executing verification plans, developing testbenches, and identifying design flaws to guarantee that the products meet high-performance standards before release. This team plays a critical role in maintaining the integrity and performance of Rivos's innovative system solutions for enterprise applications.
Bo-Ray Yeh
Verification Engineer
Bobby R.
Design Verification Engineer
Dong Soo Shin (Don)
Design Verification Engineer
Feng Qiu
CPU DV Engineer
Harsha Devarkal
ASIC DV Engineer
I-Shuan Tsung
Senior Design Verification Eng...
Nicholas Gildenhuys
Design Verification Engineer
Nipoon Vasavada
Verification Engineer
Saurabh Deswal
Design Verification Engineer
Venkatesh Sheshadriv...
Soc Verification Engineer
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