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Vinis Hansalia has a strong background in SOC design verification and SOC verification engineering. Vinis currently holds the position of SOC Design Verification Engineer at Rivos Inc. starting in August 2022. Prior to this, they worked at Intel Corporation as a SOC Verification Engineer from June 2016 to August 2022. Vinis also gained experience as a Graduate Student at Georgia Institute of Technology from August 2014 to May 2016. In addition, Vinis Hansalia worked at Xilinx as an Intern from May 2015 to December 2015, where they created Perl scripts for monitoring license usage and developed a centralized MySQL database repository. Before that, they worked as an ASIC Verification Engineer at eInfochips from January 2012 to July 2014, where they created verification plans and developed UVM components. Vinis Hansalia also had an internship at L&T Integrated Engineering Services from January 2011 to June 2011.

Vinis Hansalia holds a Master of Science (M.S.) degree in Electrical and Electronics Engineering from the Georgia Institute of Technology, which they earned from 2014 to 2016. Prior to that, they obtained their Bachelor of Technology (B.Tech.) degree in Electronics and Instrumentation from the Birla Institute of Technology and Science, Pilani, where they studied from 2007 to 2011.