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Chirag Parekh is a seasoned QA Technical Manager at Parallel Wireless since June 2021, previously serving as a Lead QA Engineer. Prior experience includes a role as Principal QA Engineer at Oracle from September 2019 to May 2021 and extensive contributions at Avaya from October 2013 to September 2019, including developing an automation framework and core Python libraries for various Avaya clients. Earlier in the career, Chirag worked as a Senior Executive at TATA Communications Ltd., focusing on testing SIP call scenarios with vendors. Chirag holds a Bachelor's Degree in Electronics and Communication Engineering from A.D. Patel Institute of Engineering, completed in 2008.