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Zvi Ben Yosef is a seasoned engineering professional with expertise in design verification and chip design, currently serving as a Design Verification Engineer at NextSilicon since December 2021. Previously, Zvi worked at Amazon Web Services (AWS) as a Chip Design Verification Engineer from September 2016 to December 2021, focusing on verification using SystemVerilog UVM. Prior experience includes a role at Mellanox Technologies as a Chip Design Engineer, where Zvi specialized in Verilog and Specman for RISC processor and firmware interface design from December 2011 to September 2016. Earlier, Zvi was a Software Engineer at Rafael, responsible for the design and implementation of software environments and systemic integration from December 2009 to December 2011. Zvi holds a B.Sc in Electric Engineering with a focus on Computer Architectures and Micro & Nano Electronics from the Technion - Israel Institute of Technology, obtained between 2007 and 2011.