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Amots Shilony is an experienced VLSI Verification Team Leader at NeuroBlade since December 2019, with prior roles at Marvell Semiconductor as a Design and Verification Engineer from July 2013 to December 2019, focusing on unit level design and verification. Amots has also served as a Senior Backend & VLSI Engineer, specializing in HLS design and backend processes at 28nm and 16nm nodes. Earlier experience includes a position at Freescale Semiconductor as a Backend & VLSI Engineer, managing RTL2GDSII workflows for innovative baseband chips, and a research assistant role at Ben Gurion University. Amots holds a Bachelor of Science in Electrical and Computer Engineering from Ben-Gurion University of the Negev, completed in 2012.