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Joe Garofalo is an accomplished engineering professional with extensive experience in semiconductor technology, specifically in the development of SSD controllers and ASICs. Currently serving as a Director at Micron Technology since October 2015, Joe leads architecture and development for NVMe SSD controllers and deep-learning accelerators. Previously, as General Manager and VP at Tidal Systems, Joe established key design and verification teams, culminating in the successful tape-out of a 28nm SoC. Joe's background includes a role as Technical Director at LSI Corporation, where Joe managed a large design center focused on HDD ASICs, and earlier positions in design management at Agere Systems and Lucent Technologies, where Joe led significant advancements in read-channel IP and optical lithography. Joe Garofalo holds a Master's degree in Electrical Engineering from Rutgers University.